Patent · US Active

Method and system for logic built-in self-test

US9285424B2 · kind B2 · utility

2Cited by

12References

12Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Nitin Singh · Bengaluru, IN
Amit Jindal · Palo Alto, US
Anurag Jindal · Singapore, SG

Key dates

Filing date	Jul 25, 2014
Grant date	Mar 15, 2016
Priority date	—
Expiry date	Dec 1, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/3187
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A controller executes a first LBIST test on a device at a first shift frequency on a plurality of partitions and detects any voltage drop at sense points in each partition during the test. If a voltage drop is detected, then the test is re-run for those partitions that failed the first test. If failures are detected during the re-execution, then a further test at a lower shift frequency is performed. The partitions can be tested sequentially or in parallel and invention has the advantage of reducing the time taken for executing LBIST when the device is booted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.