Random access memory architecture for reading bit states
US9293182B2 · kind B2 · utility
4Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Nov 29, 2012 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Dec 25, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1675
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An architecture and method includes providing an oscillatory signal through each magnetic tunnel junction (MTJ), or in a line adjacent each MTJ, in a magnetoresistive random access memory array. A rectified signal appearing across each MTJ is measured and compared to a reference signal for determining the state of the MTJ.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.