Double patterning method of forming semiconductor active areas and isolation regions
US9293358B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Mar 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3088
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming active areas and isolation regions in a semiconductor substrate using a double patterning process. The method include forming a first material on the substrate surface, forming a second material on the first material, forming a plurality of first trenches into the second material wherein the plurality of first trenches are parallel to each other, forming a second trench into the second material wherein the second trench is perpendicular to and crosses the plurality of first trenches in a central region of the substrate, filling the first and second trenches with a third material, removing the second material to form third trenches in the third material that are parallel to each other and do not extend through the central region of the substrate, and extending the third trenches through the first material and into the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.