Method of fin patterning
US9293568B2 · kind B2 · utility
150Cited by
598References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 27, 2014 |
| Grant date | Mar 22, 2016 |
| Priority date | — |
| Expiry date | Jan 27, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67109
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention may include a semiconductor patterning method involving forming a fin on a substrate, where the fin may have a sloped sidewall. The fin may be characterized by an initial height and a first width measured proximate a midpoint of the initial height. The method may include forming a masking layer above the fin, and the method may involve removing a first portion of the masking layer. The method may include decreasing the first width of the fin while maintaining the initial height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.