Reconfigurable circuit to emulate system critical paths
US9298250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2013 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Mar 1, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for monitoring and controlling a clock signal generated by a clock source in a microprocessor device may include a voltage divider network that provides a plurality of voltages, a selector device that receives the plurality of voltages and provides a scaled supply voltage and a scaled ground voltage from the plurality of voltages, and at least one delay element that receives the scaled supply voltage and the scaled ground voltage and generates a delayed pulse signal by applying a delay to each pulse of the clock signal. The delayed pulse signal may include a delay magnitude that is controllable by the scaled supply voltage and the scaled ground voltage, such that the delayed pulse signal is used to generate a frequency correction signal based on a variation to a supply voltage of the microprocessor. The frequency correction signal may then be applied to the clock source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.