Marshall D. Tiner
15Patents
4h-index
12Co-inventors
49Inventor score
Filing activity: Apr 9, 2013 → Feb 25, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9000822B2 | Programmable delay circuit | Electricity | 9 | Active |
| US9407247B2 | Programmable delay circuit | Electricity | 6 | Active |
| US9298250B2 | Reconfigurable circuit to emulate system critical paths | Emerging Cross-Sectional Technologies | 5 | Active |
| US8941426B1 | Extending a clock frequency range of a critical path monitor | Physics | 5 | Active |
| US9628059B2 | Fine delay structure with programmable delay ranges | Electricity | 2 | Active |
| US9712144B2 | Fine delay structure with programmable delay ranges | Electricity | 2 | Active |
| US9543936B1 | Reconfigurable voltage desensitization circuit to emulate system critical paths | Electricity | 1 | Active |
| US9223295B2 | Time-to-digital converter | Electricity | 1 | Active |
| US10156882B2 | Multi-core dynamic frequency control system | Emerging Cross-Sectional Technologies | 1 | Active |
| US10152107B2 | Multi-core dynamic frequency control system | Emerging Cross-Sectional Technologies | 0 | Active |
| US9369119B2 | Adjustable delay calibration in a critical path monitor | Electricity | 0 | Active |
| US9608610B2 | Reconfigurable voltage desensitization circuit to emulate system critical paths | Electricity | 0 | Active |
| US10291217B2 | Fine delay structure with programmable delay ranges | Electricity | 0 | Active |
| US8826206B1 | Testing two-state logic power island interface | Physics | 0 | Active |
| US10892743B2 | Fine delay structure with programmable delay ranges | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.