Method for fabricating a power semiconductor package including vertically stacked driver IC
US9299690B2 · kind B2 · utility
1Cited by
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11Claims
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Assignee
Inventors
Key dates
| Filing date | Oct 6, 2015 |
| Grant date | Mar 29, 2016 |
| Priority date | — |
| Expiry date | Oct 6, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage attached to the die side of the control conductive carrier, and a driver integrated circuit (IC) for driving the control FET. The driver IC is situated above the control FET and is electrically coupled to the control FET by at least one conductive buildup layer formed over the control conductive carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.