Methods for fabricating integrated circuits using directed self-assembly including lithographically-printable assist features
US9305800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2014 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Mar 28, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/308
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming assisting etch resistant fill topographical features that overlie a semiconductor substrate and that define an assisting etch resistant fill confinement well using a photomask. The photomask defines an assisting lithographically-printable mask feature. A block copolymer is deposited into the assisting etch resistant fill confinement well. The block copolymer is phase separated into an etchable phase and an etch resistant phase. The assisting etch resistant fill topographical features direct the etch resistant phase to form an etch resistant plug in the assisting etch resistant fill confinement well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.