Patent · US Active

Method of making a three dimensional NAND device

US9305849B1 · kind B1 · utility

27Cited by
23References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 12, 2014
Grant dateApr 5, 2016
Priority date
Expiry dateNov 12, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/50

Abstract

A monolithic three dimensional NAND string includes a semiconductor channel, an end part of the semiconductor channel extending substantially perpendicular to a major surface of a substrate, a plurality of control gate electrodes extending substantially parallel to the major surface of the substrate, a charge storage material layer located between the plurality of control gate electrodes and the semiconductor channel, a tunnel dielectric located between the charge storage material layer and the semiconductor channel, and a blocking dielectric containing a plurality of clam-shaped portions each having two horizontal portions connected by a vertical portion. Each of the plurality of control gate electrodes are located at least partially in an opening in the clam-shaped blocking dielectric, and a plurality of discrete cover oxide segments embedded in part of a thickness of the charge storage material layer and located between the blocking dielectric and the charge storage material layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.