Patent · US Active

Semiconductor device with combined power and ground ring structure

US9305898B2 · kind B2 · utility

0Cited by

7References

10Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Kong Bee Tiu · Port Klang, MY
Ruzaini B. Ibrahim · Kapar, MY
Wen Shi Koh · Petaling Jaya, MY

Key dates

Filing date	Jan 23, 2014
Grant date	Apr 5, 2016
Priority date	—
Expiry date	Jun 19, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19107
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device includes a lead frame, and an integrated circuit die. The lead frame has a flag for supporting the die and leads that surround that flag and die. The lead frame also has ground ring that surrounds the flag and die. First bond wires electrically connect the die to the lead frame leads. An insulating layer is disposed on the ground ring, and a power layer is disposed on the insulating layer. The semiconductor device further includes second bond wires that connect the die to the ground ring and third bond wires that connect the die to the power layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.