Multi-level contact to a 3D memory array and method of making
US9305935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2015 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Feb 25, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making multi-level contacts. The method includes providing an in-process multilevel device including at least one device region and at least one contact region. The contact region includes a plurality of electrically conductive layers configured in a step pattern. The method also includes forming a conformal etch stop layer over the plurality of electrically conductive layers, forming a first electrically insulating layer over the etch stop layer, forming a conformal sacrificial layer over the first electrically insulating layer and forming a second electrically insulating layer over the sacrificial layer. The method also includes etching a plurality of contact openings through the etch stop layer, the first electrically insulating layer, the sacrificial layer and the second electrically insulating layer in the contact region to the plurality of electrically conductive layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.