Receiver having a wide common mode input range
US9306509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2012 |
| Grant date | Apr 5, 2016 |
| Priority date | — |
| Expiry date | Jan 15, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0276
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a differential amplifier is provided. Gates of a first differential pair of transistors, of a first conductivity type, and a second pair or transistors, of a second conductivity type are coupled to first and second input terminals of the differential amplifier. A first pair of adjustable current sources are configured to adjust respective tail currents of the first differential pair of transistors in response to a first bias current control signal. A second pair of adjustable current sources are configured to adjust respective tail currents of the second differential pair of transistors in response to the first bias current control signal. A third pair of adjustable current sources are configured to adjust respective currents through the second differential pair of transistors in response to a second bias current control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.