Jafar Savoj
72Patents
9h-index
50Co-inventors
81Inventor score
Filing activity: Feb 12, 2001 → Jul 26, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8929496B2 | Receiver with enhanced clock and data recovery | Electricity | 56 | Active |
| US7233182B1 | Circuitry for eliminating false lock in delay-locked loops | Electricity | 26 | Expired |
| US8841948B1 | Injection-controlled-locked phase-locked loop | Electricity | 25 | Active |
| US8604840B2 | Frequency synthesizer noise reduction | Electricity | 22 | Active |
| US7643583B1 | High-precision signal detection for high-speed receiver | Emerging Cross-Sectional Technologies | 18 | Active |
| US9160396B2 | LO generation and distribution in a multi-band transceiver | Electricity | 12 | Active |
| US9325489B2 | Data receivers and methods of implementing data receivers in an integrated circuit | Electricity | 12 | Active |
| US6847789B2 | Linear half-rate phase detector and clock and data recovery circuit | Electricity | 11 | Expired |
| US8164361B2 | Low power complementary logic latch and RF divider | Electricity | 11 | Active |
| US7016613B2 | Linear half-rate phase detector and clock and data recovery circuit | Electricity | 9 | Expired |
| US9124413B2 | Clock and data recovery for NFC transceivers | Electricity | 8 | Active |
| US8472515B1 | Clock and data recovery circuit with decision feedback equalization | Electricity | 7 | Active |
| US8687752B2 | Method and apparatus for receiver adaptive phase clocked low power serial link | Electricity | 7 | Active |
| US10345846B1 | Reference voltage circuit with flipped-gate transistor | Physics | 6 | Active |
| US8412141B2 | LR polyphase filter | Electricity | 6 | Active |
| US7230461B1 | Retiming circuits for phase-locked loops | Electricity | 6 | Expired |
| US9503068B1 | Supply voltage envelope detection | Physics | 5 | Active |
| US9292782B2 | Adaptive NFC transceivers | Physics | 4 | Active |
| US8686887B2 | NFC transceiver with current converter | Physics | 4 | Active |
| US9306509B2 | Receiver having a wide common mode input range | Electricity | 4 | Active |
| US8559145B1 | Serializer/deserializer frontend | Electricity | 4 | Active |
| US7551897B1 | Method and apparatus for performing transmit pre-emphasis | Electricity | 3 | Active |
| US10521391B1 | Chip to chip interface with scalable bandwidth | Physics | 3 | Active |
| US8829954B2 | Frequency divider circuit | Electricity | 3 | Active |
| US9419781B2 | Receiver with enhanced clock and data recovery | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.