Net-voltage-aware optical proximity correction (OPC)
US9311442B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2014 |
| Grant date | Apr 12, 2016 |
| Priority date | — |
| Expiry date | Nov 11, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments include computer-implemented methods, computer program products and systems for verifying an integrated circuit (IC) layout. In some cases, approaches include a computer-implemented method of verifying an IC layout, the method including: obtaining data about a process variation band for at least one physical feature in the IC layout; determining voltage-based process variation band thresholds for the at least one physical feature in the IC layout; determining whether the process variation band for the at least one physical feature in the IC layout meets design specifications for the IC layout based upon the voltage-based process variation band thresholds for the at least one physical feature in the IC layout; and modifying the IC layout in response to a determination that the process variation band for the at least one physical feature does not meet the design specifications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.