Moisture scavenging layer for thinner barrier application in beol integration
US9318437B1 · kind B1 · utility
8Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2015 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Feb 2, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a thinner barrier/liner stack for vias and metal lines and the resulting device are disclosed. Embodiments include forming a via through an interlayer dielectric (ILD) and capping layer, down to a first metal layer; forming a moisture scavenging layer precursor over the ILD and on side and bottom surfaces of the via; annealing the moisture scavenging layer precursor, forming a moisture scavenging layer; forming a barrier/liner stack over the moisture scavenging layer; and depositing a second metal layer over the barrier/liner stack and filling the via and trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.