Ramp voltage generator and method for testing an analog-to-digital converter
US9319033B1 · kind B1 · utility
16Cited by
14References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2015 |
| Grant date | Apr 19, 2016 |
| Priority date | — |
| Expiry date | Jun 22, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/109
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and circuit for generating ramped voltages are provided. The ramp voltage generator circuit includes: a switched-capacitor amplifier having an input terminal, an output terminal, a sampling capacitor switchably coupled to the input terminal, and a gain capacitor switchably coupled to the output terminal; and a current source having a terminal coupled to a supply terminal, and a terminal coupled to the input terminal. The ramp voltage generator circuit may be coupled to test an analog-to-digital converter (ADC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.