Stacked semiconductor apparatus and semiconductor system capable of inputting signals through various paths
US9324380B2 · kind B2 · utility
3Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Jul 31, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/157
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor apparatus includes a control signal reception portion. The control signal reception portion may set information related to operation of a memory chip by receiving a command signal and an address signal from one among a stack chip test portion, a control signal interface portion and a test setting portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.