Patent · US Active

Machining process for semiconductor wafer

US9324558B2 · kind B2 · utility

0Cited by
1References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 20, 2014
Grant dateApr 26, 2016
Priority date
Expiry dateJun 20, 2034

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB24B37/042
  • WIPO fieldMachine tools
  • WIPO sectorMechanical engineering

Abstract

A surface of a semiconductor wafer is subjected to high flattening processing.A resin application and grinding step is repeatedly carried out, the step including determining as a reference surface a flat surface obtained by applying a curable material to one entire surface of a wafer sliced out from a semiconductor single crystal ingot with the use of a wire saw apparatus and performing surface grinding with respect to the other surface of the wafer, and determining as a reference surface the other surface of the wafer subjected to the surface grinding and performing the surface grinding with respect to the one surface of the wafer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.