Method for fabricating semiconductor device
US9324610B2 · kind B2 · utility
7Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2014 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Aug 10, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least one metal gate thereon, a source/drain region adjacent to two sides of the at least one metal gate, and an interlayer dielectric (ILD) layer around the at least one metal gate; forming a plurality of contact holes in the ILD layer to expose the source/drain region; forming a first metal layer in the contact holes; performing a first thermal treatment process; and performing a second thermal treatment process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.