Data receivers and methods of implementing data receivers in an integrated circuit
US9325489B2 · kind B2 · utility
12Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2013 |
| Grant date | Apr 26, 2016 |
| Priority date | — |
| Expiry date | Dec 19, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03885
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data receiver implemented in an integrated circuit is described. The data receiver comprises an input receiving a data signal; a first equalization circuit coupled to receive the data signal, wherein the first equalization circuit is used to receive the data of the data signal; and a second equalization circuit coupled to receive the data signal, wherein the second equalization circuit is used to adjust a clock phase offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.