Integrated circuit package system with multi-chip module
US9330945B2 · kind B2 · utility
34Cited by
6References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2007 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Oct 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package system with multi-chip module is provided including: providing an upper substrate having an upper chip thereon; positioning a lower chip under the upper chip, the lower chip having bottom interconnects thereon; encapsulating the upper chip and the lower chip with a chip encapsulant on the upper substrate with the bottom interconnects exposed; mounting the lower chip over a lower substrate with a gap between the chip encapsulant and the lower substrate; and filling the gap with a package encapsulant or chip attach adhesive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.