Patent · US Active

Device including two power semiconductor chips and manufacturing thereof

US9331060B2 · kind B2 · utility

43Cited by

5References

8Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Ralf Otremba · Kaufbeuren, DE
Josef Hoeglauer · Munich, DE
Joachim Mahler · Regensburg, DE
Johannes Lodermeyer · Kinding, DE

Key dates

Filing date	Feb 9, 2015
Grant date	May 3, 2016
Priority date	—
Expiry date	Feb 9, 2035

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.