Vertical power transistor device

US9331197B2 · kind B2 · utility

Assignee

• Cree, Inc. · US

Inventors

• Vipindas Pala · Morrisville, US
• Anant Agarwal · San Jose, US
• Lin Cheng · Chapel Hill, US
• Daniel Jenner Lichtenwalner · Raleigh, US
• John Williams Palmour · Raleigh, US

Key dates

• Filing date: Aug 8, 2013
• Grant date: May 3, 2016
• Expiry date: Aug 8, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/8325

Abstract

A power metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a drift layer over the substrate, and a spreading layer over the drift layer. The spreading layer includes a pair of junction implants separated by a junction gate field effect (JFET) region. A gate oxide layer is on top of the spreading layer. The gate contact is on top of the gate oxide layer. Each one of the source contacts are on a portion of the spreading layer separate from the gate oxide layer and the gate contact. The drain contact is on the surface of the substrate opposite the drift layer.