Electronic device having buried gate and method for fabricating the same
US9331267B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2014 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Mar 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Electronic devices having semiconductor elements and methods for fabricating such devices including, a method for fabricating an electronic device including a semiconductor memory, which includes: forming a sacrificial layer on a substrate including a first region and a second region; selectively etching the sacrificial layer and the substrate of the first region to form a trench; forming a first gate that fills a part of the trench in the first region; forming a gate protection layer on the first gate to fill the remaining part of the trench; removing the sacrificial layer of the first region to form a grooved portion surrounded by the gate protection layer; forming a conductive plug to cover the grooved portion; removing the sacrificial layer of the second region; and forming a second gate on the substrate of the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.