Receivers and methods of enabling the calibration of circuits receiving input data
US9331701B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 2014 |
| Grant date | May 3, 2016 |
| Priority date | — |
| Expiry date | Aug 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/0011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data interface enabling the calibration of input data comprises a first data receiver having a first plurality of input data lines coupled to receive a corresponding first plurality of data bits associated with a data bus, the first data receiver having a first control circuit enabling calibration of the first plurality of input data lines; and a second data receiver having a second plurality of input data lines coupled to receive a corresponding second plurality of data bits associated with the data bus, the second data receiver having a second control circuit enabling calibration of the second plurality of data lines. The first plurality of input data lines of the first data receiver are calibrated in parallel with the second plurality of input data lines of the second data receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.