Word line address scan
US9343179B2 · kind B2 · utility
0Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2013 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Jul 3, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for performing three scans for testing an address decoder and word line drive circuits is disclosed. The first scan determines whether only one word line is selected. The second scan determines whether the word line rise time to a target voltage level is within a specified time. Finally, the third scan determines whether the correct word line was selected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.