Process of forming an electronic device having a termination region including an insulating region
US9343528B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2014 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | May 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device can include an electronic component and a termination region adjacent to the electronic component region. In an embodiment, the termination region can include an insulating region that extends a depth into a semiconductor layer, wherein the depth is less than 50% of the thickness of the semiconductor layer. In another embodiment, the termination region can include a first insulating region that extends a first depth into the semiconductor layer, and a second insulating region that extends a second depth into the semiconductor layer, wherein the second depth is less than the first depth. In another aspect, a process of forming an electronic device can include patterning a semiconductor layer to define a trench within termination region while another trench is being formed for an electronic component within an electronic component region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.