Semiconductor device having a dense trench transistor cell array
US9343565B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2015 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Sep 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
Abstract
One embodiment of a semiconductor device includes a dense trench transistor cell array. The dense trench transistor cell array includes a plurality of transistor cells in a semiconductor body. A width w3 of a transistor mesa region of each of the plurality of transistor cells and a width w1 of a first trench of each of the plurality of transistor cells satisfy the following relationship: w3<1.5×w1. The semiconductor device further includes semiconductor diodes. At least one of the semiconductor diodes is arranged between first and second parts of the plurality of transistor cells and includes a diode mesa region adjoining opposing walls of second trenches. A depth d1 of the first trench and a depth d2 of the second trenches differ by at least 20%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.