Embedded magnetoresistive random access memory (MRAM) integration with top contacts
US9343659B1 · kind B1 · utility
39Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2015 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Feb 18, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/00
Abstract
A magnetoresistive random access memory (MRAM) device includes a top electrode or top contact above a metal hard mask which has a limited height due to process limitations in advanced nodes. The metal hard mask is provided on a magnetic tunnel junction (MTJ). The top contact for the MTJ is formed within a dielectric layer, such as a low dielectric constant (low-k) or extremely low-k layer. An additional dielectric layer is provided above the top contact for additional connections for additional circuitry to form a three-dimensional integrated circuit (3D IC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.