Measuring delay between signal edges of different signals using an undersampling clock
US9344075B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2014 |
| Grant date | May 17, 2016 |
| Priority date | — |
| Expiry date | Jul 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system may measure a first sample, of a first signal, using an undersampling signal. The system may measure a second sample, of a second signal, using the undersampling signal. The undersampling signal may have a frequency that is based on a frequency of the first signal or a frequency of the second signal. The system may detect, based on measuring the first sample, a first edge of the first signal. The system may detect, based on measuring the second sample, a second edge of the second signal. The system may determine a delay, associated with the first signal and the second signal, based on detecting the first edge, based on detecting the second edge, based on a first cycle time of the undersampling signal, and based on a second cycle time of the first signal or the second signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.