Technique for accessing content-addressable memory
US9348762B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2012 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Aug 20, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1018
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A tag unit configured to manage a cache unit includes a coalescer that implements a set hashing function. The set hashing function maps a virtual address to a particular content-addressable memory unit (CAM). The coalescer implements the set hashing function by splitting the virtual address into upper, middle, and lower portions. The upper portion is further divided into even-indexed bits and odd-indexed bits. The even-indexed bits are reduced to a single bit using a XOR tree, and the odd-indexed are reduced in like fashion. Those single bits are combined with the middle portion of the virtual address to provide a CAM number that identifies a particular CAM. The identified CAM is queried to determine the presence of a tag portion of the virtual address, indicating a cache hit or cache miss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.