Semiconductor device and method of forming the same
US9349833B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2015 |
| Grant date | May 24, 2016 |
| Priority date | — |
| Expiry date | Feb 5, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a plurality of gate structures, a source/drain region, a first dielectric layer, and a floating spacer. The gate structures are disposed on a substrate, and each gate structure includes a gate electrode, a capping layer and a spacer surrounding the gate electrode and the capping layer. The source/drain region is disposed at two sides of the gate electrode. The first dielectric layer is disposed on the substrate and has a height being less than a height of the gate electrode. The floating spacer is disposed on a side wall of the spacer, and also on the first dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.