Processor with hybrid pipeline capable of operating in out-of-order and in-order modes
US9354884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Sep 26, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3873
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit arrangement provide support for a hybrid pipeline that dynamically switches between out-of-order and in-order modes. The hybrid pipeline may selectively execute instructions from at least one instruction stream that require the high performance capabilities provided by out-of-order processing in the out-of-order mode. The hybrid pipeline may also execute instructions that have strict power requirements in the in-order mode where the in-order mode conserves more power compared to the out-of-order mode. Each stage in the hybrid pipeline may be activated and fully functional when the hybrid pipeline is in the out-of-order mode. However, stages in the hybrid pipeline not used for the in-order mode may be deactivated and bypassed by the instructions when the hybrid pipeline dynamically switches from the out-of-order mode to the in-order mode. The deactivated stages may then be reactivated when the hybrid pipeline dynamically switches from the in-order mode to the out-of-order mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.