Manufacturing method of semiconductor structure
US9356125B1 · kind B1 · utility
4Cited by
2References
15Claims
0Family size
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Key dates
| Filing date | Jul 28, 2015 |
| Grant date | May 31, 2016 |
| Priority date | — |
| Expiry date | Jul 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
Abstract
A manufacturing method of a semiconductor structure includes the following steps. A high-k dielectric layer is formed on a semiconductor substrate, and a barrier layer is formed on the high-k dielectric layer. An oxygen annealing treatment is performed after the step of forming the barrier layer; and a capping layer is formed on the barrier layer after the oxygen annealing treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.