Sensing data in resistive switching memory devices
US9361975B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2013 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Mar 16, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0073
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and methods of operating a resistive switching memory device are disclosed herein. In one embodiment, a resistive switching memory device can include: (i) a plurality of resistive memory cells, where each of the resistive switching memory cells is configured to be programmed to a low resistance state by application of a first voltage in a forward bias direction, and to be erased to a high resistance state by application of a second voltage in a reverse bias direction; and (ii) a sensing circuit coupled to at least one of the plurality of resistive memory cells, where the sensing circuit is configured to read a data state of the at least one resistive memory cell by application of a third voltage in the forward bias direction or the bias reverse direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.