Apparatuses and methods for forming multiple decks of memory cells
US9362300B2 · kind B2 · utility
20Cited by
1References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2014 |
| Grant date | Jun 7, 2016 |
| Priority date | — |
| Expiry date | Oct 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments include apparatuses and methods having multiple decks of memory cells and associated control gates. A method includes forming a first deck having alternating conductor materials and dielectric materials and a hole containing materials extending through the conductor materials and the dielectric materials. The methods can also include forming a sacrificial material in an enlarged portion of the hole and forming a second deck of memory cells over the first deck. Additional apparatuses and methods are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.