Zhenyu Lu
142Patents
21h-index
145Co-inventors
89Inventor score
Filing activity: Jul 26, 2006 → Nov 6, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9449987B1 | Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors | Electricity | 391 | Active |
| US9530790B1 | Three-dimensional memory device containing CMOS devices over memory stack structures | Electricity | 108 | Active |
| US9502471B1 | Multi tier three-dimensional memory devices including vertically shared bit lines | Electricity | 83 | Active |
| US9449982B2 | Method of making a vertical NAND device using a sacrificial layer with air gap and sequential etching of multilayer stacks | Electricity | 60 | Active |
| US10403631B1 | Three-dimensional ferroelectric memory devices | Electricity | 47 | Active |
| US9543318B1 | Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors | Electricity | 47 | Active |
| US10283452B2 | Three-dimensional memory devices having a plurality of NAND strings | Electricity | 46 | Active |
| US9673213B1 | Three dimensional memory device with peripheral devices under dummy dielectric layer stack and method of making thereof | Electricity | 43 | Active |
| US10147732B1 | Source structure of three-dimensional memory device and method for forming the same | Electricity | 43 | Active |
| US9728551B1 | Multi-tier replacement memory stack structure integration scheme | Electricity | 41 | Active |
| US9853043B2 | Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material | Electricity | 39 | Active |
| US10249640B2 | Within-array through-memory-level via structures and method of making thereof | Electricity | 34 | Active |
| US10269620B2 | Multi-tier memory device with through-stack peripheral contact via structures and method of making thereof | Electricity | 29 | Active |
| US10256248B2 | Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof | Electricity | 29 | Active |
| US9679906B2 | Three-dimensional memory devices containing memory block bridges | Electricity | 28 | Active |
| US8876661B2 | Multi-functional motivating exercise equipment | Human Necessities | 28 | Active |
| US9780034B1 | Three-dimensional memory device containing annular etch-stop spacer and method of making thereof | Electricity | 27 | Active |
| US9935050B2 | Multi-tier three-dimensional memory devices including vertically shared source lines and method of making thereof | Electricity | 24 | Active |
| US10115732B2 | Three dimensional memory device containing discrete silicon nitride charge storage regions | Electricity | 23 | Active |
| US9842907B2 | Memory device containing cobalt silicide control gate electrodes and method of making thereof | Electricity | 23 | Active |
| US10553604B2 | Through array contact structure of three-dimensional memory device | Electricity | 21 | Active |
| US10593690B2 | Hybrid bonding contact structure of three-dimensional memory device | Electricity | 20 | Active |
| US9362300B2 | Apparatuses and methods for forming multiple decks of memory cells | Electricity | 20 | Active |
| US9853046B2 | Apparatuses and methods for forming multiple decks of memory cells | Electricity | 19 | Active |
| US9437604B2 | Methods and apparatuses having strings of memory cells including a metal source | Electricity | 17 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.