Methods of forming elastically relaxed SiGe virtual substrates on bulk silicon

US9362361B1 · kind B1 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventor

• Murat Kerem Akarvardar · Saratoga Springs, US

Key dates

• Filing date: May 18, 2015
• Grant date: Jun 7, 2016
• Expiry date: May 18, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

One illustrative method disclosed herein includes, among other things, forming a composite fin structure comprised of a sacrificial silicon material and a first non-sacrificial semiconductor material positioned above the sacrificial silicon material, forming a second non-sacrificial semiconductor material in each of the trenches adjacent the composite fin structure, performing at least one etching process so as to cut the composite fin structure and thereby expose cut end surfaces of the sacrificial silicon material, selectively removing the sacrificial silicon material of the composite fin structure relative to the first and second non-sacrificial semiconductor materials and forming a layer of strained channel semiconductor material above an upper surface of the first non-sacrificial semiconductor material of the composite fin structure and above an upper surface of the second non-sacrificial semiconductor materials positioned in the trenches.