FinFET device with dual-strained channels and method for manufacturing thereof
US9368498B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 2015 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Oct 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A FinFET device and a method for manufacturing a FinFET device is provided. An example device may comprise a substrate including at least two fin structures. Each of the at least two fin structures may be in contact with a source and drain region and each of the at least two fin structures may include a strain relaxed buffer (SRB) overlying and in contact with the substrate and an upper layer overlying and in contact with the SRB. The composition of the upper layer and the SRB may be selected such that the upper layer of a first fin structure is subjected to a first mobility enhancing strain in the as-grown state, the first mobility enhancing strain being applied in a longitudinal direction from the source region to the drain region and where at least an upper part of the upper layer of a second fin structure is strain-relaxed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.