Inventor · Fishkill, NY, US

Voon-Yew Thean

59Patents
13h-index
71Co-inventors
83Inventor score

Filing activity: Sep 25, 2003 → Apr 24, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US7226833B2 Semiconductor device structure and method therefor Electricity 122 Expired
US7018901B1 Method for forming a semiconductor device having a strained channel and a heterojunction source/drain Electricity 65 Expired
US7282402B2 Method of making a dual strained channel semiconductor device Electricity 42 Expired
US7585735B2 Asymmetric spacers and asymmetric source/drain extension layers Electricity 30 Expired
US7067868B2 Double gate device having a heterojunction source/drain and strained channel Electricity 28 Expired
US7575975B2 Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer Emerging Cross-Sectional Technologies 22 Active
US7037795B1 Low RC product transistors in SOI semiconductor process Electricity 19 Expired
US7867839B2 Method to reduce threshold voltage (Vt) in silicon germanium (SiGe), high-k dielectric-metal gate, p-type metal oxide semiconductor field effect transistors Electricity 19 Active
US7323389B2 Method of forming a FINFET structure Electricity 16 Active
US7226820B2 Transistor fabrication using double etch/refill process Electricity 16 Expired
US7029980B2 Method of manufacturing SOI template layer Emerging Cross-Sectional Technologies 13 Expired
US6979622B1 Semiconductor transistor having structural elements of differing materials and method of formation Electricity 13 Expired
US7803670B2 Twisted dual-substrate orientation (DSO) substrates Electricity 13 Active
US7205210B2 Semiconductor structure having strained semiconductor and method therefor Electricity 13 Expired
US10211312B2 Ferroelectric memory device and fabrication method thereof Electricity 12 Active
US7091071B2 Semiconductor fabrication process including recessed source/drain regions in an SOI wafer Electricity 12 Expired
US7230264B2 Semiconductor transistor having structural elements of differing materials Electricity 12 Expired
US7736957B2 Method of making a semiconductor device with embedded stressor Electricity 11 Active
US9476143B2 Methods using mask structures for substantially defect-free epitaxial growth Electricity 10 Active
US7821067B2 Electronic devices including a semiconductor layer Electricity 10 Active
US7282415B2 Method for making a semiconductor device with strain enhancement Electricity 9 Expired
US9171904B2 FinFET device with dual-strained channels and method for manufacturing thereof Electricity 9 Active
US7208357B2 Template layer formation Emerging Cross-Sectional Technologies 9 Expired
US7763510B1 Method for PFET enhancement Electricity 6 Active
US7235502B2 Transitional dielectric layer to improve reliability and performance of high dielectric constant transistors Electricity 6 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.