Method of removing threading dislocation defect from a fin feature of III-V group semiconductor material
US9368604B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2015 |
| Grant date | Jun 14, 2016 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02639
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method of forming a fin-like field-effect transistor (FinFET) device. The method includes forming a first strain-relaxed buffer (SRB) stack over a substrate. The first SRB stack has a lattice mismatch with respect to the substrate that generates a threading dislocation defect feature in the first SRB stack. The method also includes forming a patterned dielectric layer over the first SRB stack. The patterned dielectric layer includes a trench extending therethrough. The method also includes forming a second SRB stack over the first SRB stack and within the trench. The second SRB stack has a lattice mismatch with respect to the substrate such that an upper portion of the second SRB stack is without threading dislocation defects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.