Integrated circuit test system and method

US9372227B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Mill-Jer Wang · Hsinchu, TW
• Ching-Nen Peng · Hsinchu, TW
• Hung-Chih Lin · Baoshan, TW
• Wei-Hsun Lin · Zhubei City, TW
• Hao Chen
• Chung-Han Huang · New Taipei, TW

Key dates

• Filing date: Mar 11, 2013
• Grant date: Jun 21, 2016
• Expiry date: Apr 11, 2034

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2884
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A system for testing a device under test (DUT) includes a probe card and a test module. The probe card includes probe beds electrically coupled to a circuit board and a first plurality of electrical contacts coupled to the circuit board, which are for engaging respective ones of a plurality of electrical contacts of a test equipment module. Probes are coupled to respective probe beds and are disposed to engage electrical contacts of the DUT. The probe card includes a second plurality of electrical contacts coupled to the circuit board. The first and second pluralities of contacts are mutually exclusive. The test module includes a memory, a processor, and a plurality of electrical contacts electrically coupled to respective ones of the second plurality of electrical contacts of the probe card. The circuit board includes a first electrical path for electrically coupling the test equipment module to the test module.