Mark segmentation method and method for manufacturing a semiconductor structure applying the same
US9373505B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Jun 21, 2016 |
| Priority date | — |
| Expiry date | Aug 20, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In this disclosure, a mark segmentation method and a method for manufacturing a semiconductor structure applying the same are provided. The mark segmentation method comprises the following steps. First, a plurality of segments having a width WS and separated from each other by a space SS formed on a substrate are identified by a processor. Thereafter, a plurality of marks are set over the segments by the processor. This step comprises: (1) adjusting a width WM of each one of the marks being equal to m(WS+SS)+WS or m(WS+SS)+SS by the processor, wherein m is an integer; and (2) adjusting a space SM of adjacent two of the marks by the processor such that WM+SM=n(WS+SS), wherein n is an integer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.