Patent · US Active

Canonical forms of layout patterns

US9378327B2 · kind B2 · utility

3Cited by
0References
18Claims
0Family size

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Key dates

Filing dateNov 10, 2014
Grant dateJun 28, 2016
Priority date
Expiry dateFeb 17, 2035

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02P90/02
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Aspects of the disclosed technology relate to techniques for determining canonical forms of layout patterns. Coordinates of vertices of geometric elements in a window of a layout design are first transformed into new coordinates of the vertices, wherein the coordinates of vertices do not comprise clipped coordinates and the transforming comprises: performing a translation on the coordinates of vertices based on differences between maximum and minimum X/Y coordinate values of the vertices. Based on sums of X/Y coordinate values of the new coordinates of the vertices, a canonical form of the geometric elements is determined. The canonical form coordinates of the vertices may then be determined and sorted. The sorted canonical form coordinates may be employed for pattern matching.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.