Inventor · Sandy, OR, US

Robert Brady Benware

20Patents
5h-index
17Co-inventors
62Inventor score

Filing activity: Apr 14, 2003 → Mar 9, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US6972592B2 Self-timed scan circuit for ASIC fault testing Physics 9 Expired
US8607107B2 Test access mechanism for diagnosis based on partitioining scan chains Physics 5 Active
US9443051B2 Generating root cause candidates for yield analysis Physics 5 Active
US7058909B2 Method of generating an efficient stuck-at fault and transition delay fault truncated scan test pattern for an integrated circuit design Physics 5 Expired
US7617427B2 Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signatures Physics 5 Active
US8930782B2 Root cause distribution determination based on layout aware scan diagnosis results Electricity 5 Active
US7079963B2 Modified binary search for optimizing efficiency of data collection time Emerging Cross-Sectional Technologies 3 Expired
US9378327B2 Canonical forms of layout patterns Emerging Cross-Sectional Technologies 3 Active
US6954705B2 Method of screening defects using low voltage IDDQ measurement Physics 3 Expired
US10234502B1 Circuit defect diagnosis based on sink cell fault models Physics 2 Active
US8707232B2 Fault diagnosis based on design partitioning Physics 2 Active
US7216280B2 Method of generating test patterns to efficiently screen inline resistance delay defects in complex ASICs Physics 2 Expired
US9026874B2 Test access mechanism for diagnosis based on partitioning scan chains Physics 1 Active
US10198548B2 Identifying the defective layer of a yield excursion through the statistical analysis of scan diagnosis results Physics 1 Active
US9244125B2 Dynamic design partitioning for scan chain diagnosis Physics 1 Active
US9336107B2 Dynamic design partitioning for diagnosis Physics 1 Active
US10496779B2 Generating root cause candidates for yield analysis Physics 0 Active
US7395478B2 Method of generating test patterns to efficiently screen inline resistance delay defects in complex asics Physics 0 Active
US7171638B2 Methods of screening ASIC defects using independent component analysis of quiescent current measurements Physics 0 Expired
US9857421B2 Dynamic design partitioning for diagnosis Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.