Patent · US Active

Write and read collision avoidance in single port memory devices

US9390017B2 · kind B2 · utility

1Cited by

9References

12Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Norbert Hagspiel · Wissen, DE
Sascha Junghans · Herrenberg, DE
Matthias Klein · Poughkeepsie, US
Joerg Walter · Lörrach, DE

Key dates

Filing date	Jun 18, 2014
Grant date	Jul 12, 2016
Priority date	—
Expiry date	Jun 18, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG11C2207/2209
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of avoiding a write collision in single port memory devices from two independent write operations is described. A first data object from a first write operation is divided into a first even sub-data object and first odd sub-data object. A second data object from a second write operation is divided into a second even sub-data object and a second odd sub-data object. The first even sub-data object is stored to a first single port memory device and the second odd sub-data object to a second single port memory device when the first write operation and the second write operation occur at the same time. The second even sub-data object is stored to the first single port memory device and the first odd sub-data object to the second single port memory device when the first write operation and the second write operation occur at the same time.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.