Data storage in a memory block following WL-WL short
US9390809B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2015 |
| Grant date | Jul 12, 2016 |
| Priority date | — |
| Expiry date | Feb 10, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes defining a normal voltage configuration for application to word lines (WLs) and Bit lines (BLs) of a memory block, and a an abnormal voltage configuration, different from the normal voltage configuration, for application to the WLs and the BLs of the memory block when a word-line-to-word-line (WL-WL) short-circuit is found between at least two of the WLs in the memory block. If no WL-WL short-circuit is found in the memory block, a data storage operation is performed in the memory block by applying the normal voltage configuration. If a WL-WL short-circuit is found in the memory block, the data storage operation is performed in the memory block by applying the abnormal voltage configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.