Inventor · Givatayim, IL

Barak Baum

20Patents
6h-index
30Co-inventors
61Inventor score

Filing activity: Oct 30, 2011 → Nov 28, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US9330783B1 Identifying word-line-to-substrate and word-line-to-word-line short-circuit events in a memory block Physics 14 Active
US8869008B2 Adaptation of analog memory cell read thresholds using partial ECC syndromes Electricity 12 Active
US10008278B1 Memory block usage based on block location relative to array edge Physics 11 Active
US8773905B1 Identifying and mitigating restricted sampling voltage ranges in analog memory cells Physics 10 Active
US9390809B1 Data storage in a memory block following WL-WL short Physics 8 Active
US9697075B2 Efficient search for optimal read thresholds in flash memory Physics 6 Active
US9053809B2 Data protection from write failures in nonvolatile memory Physics 5 Active
US9136015B2 Threshold adjustment using data value balancing in analog memory device Physics 5 Active
US8792281B2 Read threshold estimation in analog memory cells using simultaneous multi-voltage sense Physics 4 Active
US8493783B2 Memory device readout using multiple sense times Physics 3 Active
US10762967B2 Recovering from failure in programming a nonvolatile memory Physics 2 Active
US9779818B2 Adaptation of high-order read thresholds Physics 1 Active
US10146460B1 Programming schemes for avoidance or recovery from cross-temperature read failures Physics 1 Active
US8953372B2 Memory device readout using multiple sense times Physics 1 Active
US9021334B2 Calculation of analog memory cell readout parameters using code words stored over multiple memory dies Physics 1 Active
US10332608B2 Memory block usage based on block location relative to array edge Physics 0 Active
US9672925B2 Storage in charge-trap memory structures using additional electrically-charged regions Electricity 0 Active
US9349467B2 Read threshold estimation in analog memory cells using simultaneous multi-voltage sense Physics 0 Active
US9952779B2 Parallel scheduling of write commands to multiple memory devices Physics 0 Active
US9312017B2 Storage in charge-trap memory structures using additional electrically-charged regions Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.