Instruction swap for patching problematic instructions in a microprocessor
US9395992B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Nov 19, 2012 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Apr 7, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a method and system for replacing an instruction with another instruction. A match register stores an opcode that identifies an instruction to be replaced. A swap register stores an instruction that replaces the identified instruction. A multiplexer chooses the instruction stored in the swap register over the identified instruction if predecode bits of the identified instruction are set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.