Forming air gaps in memory arrays and memory arrays with air gaps thus formed
US9397210B2 · kind B2 · utility
0Cited by
9References
23Claims
0Family size
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Key dates
| Filing date | Oct 2, 2013 |
| Grant date | Jul 19, 2016 |
| Priority date | — |
| Expiry date | Dec 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A memory array has first and second memory cells over a semiconductor and an isolation region extending into the semiconductor. The isolation region includes an air gap between charge-storage structures of the first and second memory cells and a thickness of dielectric over the air gap and contained between the first and second memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.